The following articles and documentation represent older
material or document previous software and hardware
releases.
Cell/B.E.: Understanding the terminology
A quick-reference glossary of terms you might
encounter when installing and using the Cell Broadband
Engine (Cell/B.E.) processor SDK Version 2.1
(developerWorks, 17 April 2007).
An introduction to the IDE for the Cell Broadband Engine SDK
Unsure of where to start with the IDE for the
Cell/B.E. SDK? This introductory tutorial -- now updated
for SDK V2.1 -- runs you through the major points
(developerWorks, 30 March 2007).
Programming the Cell/B.E. processor
It may be tricky, but the performance gains are
worth the effort. Get algorithms and strategies to make
breadth-first searching on graphs as fast as possible on
the Cell/B.E. multicore processor. (Dr.Dobb's Portal, 09
March 2007).
Huge TLB pages on PS3 Linux
Understanding the TLB and minimizing misses: how to
enable support for the big and the really big in the world
of TLB (CellPerformance.com, 30 January 2007).
Integrated Cell/B.E. programming with CESOF
Meet the Cell/B.E. Embedded SPE Object Format
(CESOF) -- an ELF file targeted for PPE architecture --
and learn how to wrap an SPE executable into a PPE
linkable in a logical and standardized manner
(Embedded.com, 05 Jun 2006).
Inverse matrix on PPU and on SPU using SIMD instructions
Do you consider an inverse matrix to be
orthonormal? Then this CellPerformance.com article is for
you. Plus -- microcoded instructions, choosing to avoid
branches, and more (CellPerformance.com, 03 Jun 2006).
Cell Broadband Engine processor DMA engines, Part 2: From an SPE point of view
Meet the SPE interface to the DMA capabilities of
the processor, from channel allocation to communication
(developerWorks, 02 May 2006).
The Cell Broadband Engine processor security architecture
Prevent attackers from compromising data with the
Cell/B.E. processor's built-in content protection
features, including the secure processing vault and
hardware root of secrecy (developerWorks, 24 April
2006).
Five minutes with: Mark Nutter and Max Aguilar on the Cell/B.E. memory model
The Power Architecture PowerPC core and the
Cell/B.E. PPE unit: how different are they? Find out why
there is "nothing to fear" from Cell/B.E. programming,
after all (developerWorks, 18 April 2006).
An introduction to compiling for the Cell Broadband Engine architecture, Part 1: A bird's-eye view
Meet the Cell/B.E. processor from a
compiler-writer's perspective, and get a bird's-eye view
of a number of the unique challenges it poses
(developerWorks, 07 February 2006).
An introduction to compiling for the Cell Broadband Engine architecture, Part 2: Optimizing for the SPE
Part 2 discusses specific issues in optimizing code
to run effectively on the Synergistic Processor Elements
(SPEs) in the Cell/B.E. processor (developerWorks, 07
February 2006).
An introduction to compiling for the Cell Broadband Engine architecture, Part 3: Make the most of SIMD
See how to optimize code that must run both on the
VMX SIMD engine of the PowerPC core of the Cell/B.E.
processor and also on the SIMD-only SPEs (developerWorks,
07 February 2006).
An introduction to compiling for the Cell Broadband Engine architecture, Part 4: Partitioning large tasks
Part 4 discusses ways to partition code to run
across the multiple cores available in a Cell/B.E.
processor (developerWorks, 07 February 2006).
An introduction to compiling for the Cell Broadband Engine architecture, Part 5: Managing memory
Learn techniques for managing data in the local
store of the SPEs of a Cell/B.E. processor
(developerWorks, 07 February 2006).
High-performance server systems and the next generation of online games
Explore the challenges and issues of creating a
game for the Cell/B.E. processor (IBM Systems Journal, 12
January 2006).
MPI microtask for programming the Cell Broadband Engine processor
MPI microtask is a new programming model based on
the standard MPI model for distributed-memory parallel
machines. See how to use this model when programming the
Cell/B.E. processor (IBM Systems Journal, 11 January
2006).
Meet the experts: David Krolak on the Cell Broadband Engine EIB bus
The lead designer and EIB project manager discuss
ring versus interconnect buses, data arbiters, and bus
protocols (developerWorks, 06 December 2005).
Cell Broadband Engine processor DMA engines
DMA engines are a key component of the Cell/B.E.
architecture as they move data between SPEs and the
PowerPC core. Get an overview and learn how these DMA
engines work (developerWorks, 06 December 2005).
Papers from the Fall Processor Forum 2005: Unleashing the Cell Broadband Engine Processor: The Element Interconnect Bus
Designed to handle the bandwidth demands of a
nine-core processor running at 3GHz, the EIB is like no
bus you have ever met before. Read why (developerWorks, 29
November 2005).
Cell Broadband Engine Architecture and its first implementation
Get facts, figures, and illustrations on Cell/B.E.
performance (developerWorks, 29 November 2005).
Meet the experts: The Mambo team on the IBM Full-System Simulator for the Cell Broadband Engine processor
Members of the Cell/B.E. simulator team discuss
emulators versus simulators, cycle-accurate models, and
more (developerWorks, 22 November 2005).
Meet the experts: Alex Chow on Cell Broadband Engine programming models
Alex Chow of IBM proposes several programming
models ranging in complexity from a small single SPU to a
large interconnected multi-SPU program (developerWorks, 22
November 2005).
Papers from the Fall Processor Forum 2005: Unleashing the power of the Cell Broadband Engine: A programming model approach
The Cell/B.E. processor makes it virtually certain
that a fairly easy development effort will net an
impressive performance gain over a more traditional
processor architecture, but achieving top performance is
difficult. Learn more (developerWorks, 16 November
2005).
Power Architecture downloads and documentation: Complete developer environment for the Cell Broadband Engine
Test these tools and visit the new Cell Broadband
Engine resource center (developerWorks, 11 November
2005).
Introduction to the Cell Broadband Engine
This paper presents an overview of the Cell
Broadband Engine architecture and the processor, and
focuses on those characteristics that benefit signal
processing applications (IBM Semiconductor solutions
technical library, 31 October 2005).
An implementation of the Feldkamp Algorithm for medical imaging on Cell
This paper describes the parallelization of the 3D
image reconstruction algorithm on the Cell/B.E. (IBM
technical library, 31 October 2005).
A programming example: Large fast fourier transform on the Cell Broadband Engine
How does a large FFT, comprising 16 million (224)
single-precision complex samples stand up to the power of
the Cell/B.E.? Get the answer, as well as find code
development methodology and implementation details (IBM
technical library, 31 October 2005).
Terrain Rendering Engine (TRE): Cell Broadband Engine optimized real-time ray-caster
Introducing the Terrain Rendering Engine (TRE), a
client/server ray-casting system in which the client,
through a thin layer of network interfaces, directs the
Cell/B.E. server to render and deliver 3-dimensional
terrain views at interactive speed (IBM technical library,
31 October 2005).
Introduction to the Cell multiprocessor
The paper discusses the history of the CBEA
project, the program objectives and challenges, the design
concept, the architecture and programming models, and the
implementation (IBM Journal of Research and Development,
07 September 2005).
Cell Broadband Engine Architecture from 20,000 feet
A high-level description of the Cell Broadband
Engine (Cell/B.E.), the Synergistic Processing Elements
(SPEs), and how they work together (developerWorks, 24
August 2005).
Meet the experts: Arnd Bergmann on Cell
Learn about programming for the Cell/B.E. in
general and Linux for Cell/B.E. in particular, and a bit
more about what little is known about the forthcoming
Cell/B.E. workstation, in this Q & A session with
Linux on Cell/B.E. maintainer Arnd Bergman
(developerWorks, 25 June 2005).
A 4.80GHz fully pipelined embedded SRAM in the streaming processor of a Cell processor
This ISSCC article describes the embedded SRAM in
the streaming processor of a Cell/B.E. processor (IBM
technical library, 10 March 2005).
A double-precision multiplier with fine-grained clock-gating support for a first-generation Cell processor
This ISSCC paper describes a double-precision
multiplier for a first-generation Cell/B.E. processor (IBM
technical library, 10 March 2005).
A streaming processing unit for a Cell processor
This ISSCC paper describes the streaming processing
unit for a Cell/B.E. processor (IBM technical library, 10
March 2005).
The design and implementation of a first-generation Cell processor
This ISSCC paper describes the design and
implementation of a first-generation Cell/B.E. processor
(IBM technical library, 10 March 2005).
Microprocessor Report - Cell moves into the limelight
This Microprocessor Report article shares details
on the Cell/B.E. architecture and processor disclosure
(IBM technical library, 14 February 2005).
Microprocessor Reports - 2004 Technology Awards
This Microprocessor Report article reviews the
candidates for the 2004 Technology Awards, and the
selection of the STI Design Center and Cell/B.E. processor
(IBM technical library, 31 January 2005).
SCOP3: A rough guide to scientific computing on the PlayStation 3
This rough guide makes computing on the PlayStation
3 slightly less bumpy (PDF format; University of Tennessee
Knoxville, 10 May 2007).
Stop stalling!
Prevent indefinite stalls on SPEs with proper care
and feeding; learn how in this Semiconductor solutions
application note (IBM technical library, 26 February
2007).
| 
