 | Level: Introductory Kane Scarlett (kane@us.ibm.com), developerWorks Editor, IBM
22 Dec 2004 From spintronics to clockless CPUs, 2004 was a year of process and research in the microprocessor industry. This article offers a month-by-month look at the highlights of the 2004 microprocessor timeline.
Microprocessor themes of 2004
2004 was all about process and research. On the one hand was the
struggle to find alternatives to lead solder, since lead will be
banned from electrical and electronic equipment by EU legislation set to
take effect on January 1, 2006 (WEEE/ROHS (Waste Electronic and Electrical
Equipment / Restriction of Hazardous Substances); and because disposal of
lead-containing waste in Japan already warrants a hefty surcharge.
On the other hand, practical, traditional-physics limitations in manufacturing (quality
and yield issues) and operating (cooling, electron leakage, and so on) in
ever-shrinking, more densely packed chips, prompted paths into the
quantum computing world, requiring companies to experiment with materials as well as architecture and implementation. The long-awaited and much-debated tech including spintronics, the use of light instead of electricity for digital logic --
and even clockless CPUs -- all got more serious attention than heretofore. Nanotechnology and dual cores also took the stage, and everybody wanted to have some 90nm process.
A month-by-month glance at the microprocessor space shows these themes in finer detail. Each month begins with a brief summary to give context to the listed items.
January
In January, research gets off to a rousing start, especially research
into new materials to thwart the problems that arise when you create
smaller transistors and pack more of them in tinier areas -- problems such as
electrical leakage and overheating. An openness that comes with adopting
an open systems philosophy also seems evident as one chip manufacturer
hires another to produce its microprocessors and several companies use
chips from competitors in various products.
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February
New technologies and techniques for producing chips is a recurring
theme in February, all with the goal of finding a consistent way to beat
the emerging 90nm standard. Extreme Ultraviolet Lithography and immersion
lithography are still the best candidates to beat the limitations except that cost at present is prohibitive.
Add-ons to chips show up as AMD incorporates network security to its
Au1550 processor. As the year goes on, others will add features to chips.
Two efforts showcase silicon-on-insulator techniques: A low-power Cell
chip project entered into by IBM, Sony, and Toshiba; and the IBM PowerPC®
970FX, constructed by employing SOI, strained silicon, and copper wiring
techniques.
- Resin containing too much red phosphorus causes circuits to short
out; more than 1,000 tons of the defective resin have been shipped, having
the potential to cause as many as a
billion IC failures or even more.
- Speakers and attendees at the 2004 SPIE conference on
microlithography note that cost
issues may outstrip technical issues as the biggest obstacle to the
adoption of post-193nm techniques such as immersion lithography and
EUV.
- Intel researchers build a high-speed transistor-like
device that can encode data onto a beam of light.
- AMD and SafeNet add network
security to AMD's 32-bit Au1550 hardware and software which will be
available in 333, 400, and 500 MHz versions, each of which uses less than
one watt and supports most network security protocols.
- IBM announces a method
of making low-power, high-performance chips by a combination of SOI,
strained silicon, and copper wiring technologies; the first microprocessor to
benefit from this combination of processes will be the 90nm, 64-bit
PowerPC 970FX.
- Intel releases the 90nm Pentium
4 "Prescott" CPU.
- Intel confirms 64-bit
"extensions" in Xeon and Prescott chips.
- Texas Instruments offers new OMAP
2410 and 2420 mobile ARM processors.
- VIA offers new tiny, low-dissipation, increased-speed, 1GHz Eden ESP10000 processor that runs at the same speed as Pentium 3.
- IBM announces "open collaboration"
model for Power Architecture™ processors.
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March
Spintronics, the ability to determine and alter the magnetic
directional state of a particle, gathers momentum as a potential direction
to increase data in a smaller space. Spintronics adds another set of
data-setting variables: Instead of just being able to set data due to
charge (positive or negative, 1 or 0), you can also set data due to
magnetic positioning (up or down). This makes the concept of quantum
computing a much more real proposition.
Research into new materials and old materials processed in new ways
continues. Developers also struggle with common problems such as how
to cool the ever hotter, denser microprocessors.
A Swedish company makes an Internet-capable paper computer
(circuits are printed with conductive inks).
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April
Transistor technology takes a leap when the Taiwan Semiconductor
Manufacturing Company (TSMC) makes a double gate transistor with 5nm
gates. On the downside, many chip fabricators are smarting from the
problems of migrating from a 130nm process to a 90nm one.
In research, reduction in size causes Moore's Law to increase to three
and a half years (42 months). The nano-debate continues, but the
majority still sees a pure CMOS future.
- At the 2004 VLSI symposium, TSMC announces the development of FinFET
transistors (a double-gate device which improves drive current and
reduces electrical leakage) with 5nm gates; 20nm transistors with
a 5nm gate could lead to 10GHz microprocessors with billions of
transistors.
- TSMC differentiates
its production processes into two camps: advanced (0.13 micron, 90 and
65nm) and mainstream (0.15 to 0.5 micron).
- Migration
to 130 and 90nm production create difficulties, delays, and losses for
chip fabrication plants; problems include increased electrical
leakage, power consumption, and heat generation, leading to a decrease in
yield.
- Semiconductor International announces an amendment
to Moore's Law, predicting that the time to double transistor density
will eventually reach to 42-plus months (echoing the 1975 change of the
law to 24 months by Moore himself).
- Intel announces it will remove
95% of the lead from its chips by year's end. [EU legislation is set to take effect in 2006 which bans lead from electrical and electronic equipment. --eds.]
- Georgia Institute of Technology's James Meindl advocates using
carbon nanotubes as interconnects, optical interconnects, and thermal
interconnects (in which cryogenically cooled liquids are pumped
through ICs via microchannels) as solutions to the problems with with
scaling IC interconnects and resistance-capacitance issues for the
production of sub-100 microchips.
- FTM Consulting predicts nanotechnology
market will grow to US$75 billion within the decade, facilitating the
emergence of a commercial market for nanowires and nanotubes. Industry
analysts remain nano-skeptics, with most pundits saying that pure CMOS
will make nanostructures unnecessary.
- IBM works with Stanford University to develop
post-silicon spintronics technology -- which uses magnetic states to
add data density without appreciable energy dissipation -- for logic and
storage applications.
- Microprocessor Report analyst Tom Halfhill claims Intel
reverse-engineered AMD's 64-bit x86 extensions. If true, it could well
be the first time that has Intel followed this practice.
- AMD announces efforts
to remove lead from processors.
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May
The US government invests in nanoimprint advances and new techniques to
battle overheating, lithography limitations, and SOI unreliability. AMD introduces a buffer-overflow flag to its processors (and several
competitors decide to support it). Sony starts testing Cell processors. We
say goodbye to both AMD's Athlon XP and to the Intel Netburst
architecture.
- IBM Microelectronics announces its 200 and 300mm foundries are operating at full capacity; it's fabricating
the 64-bit POWER5™ and nVidia's GeForce 6800 GPU.
- At the International Electronics Forum 2004, Dr. Bernard
Meyerson of IBM announces that traditional
CMOS scaling has run its course (effectively ending between the 130
and 90nm modes); he wants companies to draw "innovation roadmaps," guides
to such solutions as strained silicon, silicon-on-insulator, and
multi-gate transistors.
- The National Institute of Standards and Technology (NIST) commits
US$17.5 million to developing nanoimprint technology; Motorola Labs is
one of the recipients.
- Zalman introduces the reserator,
a simple system of pump, pipes, and water reservoir to cool CPUs. The
reservoir is located outside of tower and is composed of anodized,
anti-corrosion materials.
- Startup Lumarray announces it is planning to use MIT maskless
Zone-Plate-Array Lithography technology to produce 45nm chips with
193nm optical lithography; ZPAL uses arrays of individually targetable
photon beams to fabricate complex shapes and it should theoretically work
with 157nm lithography and EUV to produce 20nm ICs (currently the
company has set no availability date).
- United Microelectronics Company describes a process
to increase transistor switching efficiency on SOI transistors. The
technique could provide PMOS transistors a 30% increase in drive
current compared to conventional body-grounded SOI transistors and could
enhance SOI reliability, at least until multi-gate transistors are
available.
- AMD introduces another security feature: a buffer
overflow NX flag in its "Hammer" line of 64-bit processors. Intel,
Transmeta, and VIA say they will also employ the "No eXecute" bit that keeps
certain nefarious inserted code from being executed.
- IBM introduces0.13 micro, 276 million transistor, multiprocessing POWER5 for the iSeries
servers.
- IBM bestows fellowships
on two chip innovators: Phaedon Avouris, a pioneer in nanotechnology, constructed functional transistors on a single carbon nanotube
molecule; David Harame spearheaded IBM's commercialization of silicon
germanium all the way to its use in BiFET and BiCMOS technologies.
- Intel showcases sample Montecito
cores for the Itanium 2 processor; speculation is that it plans to
release the 90nm, dual-core processor as a multi-chip module due to its
size (the company only gives 2005 as a potential release date).
- Sony starts testing
the 90nm Cell processor.
- VIA introduces the x86
handheld Eve Mobile Gaming Console, essentially a small PC running XP;
it contains a 533MHz Eden-N processor with low power needs and low heat
generation. VIA plans for it to be an open system.
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June
The Semiconductor Industry Association invests in nanotech to help
companies compete in post-CMOS technologies. IBM experiments with
germanium-on-insulator technology that could allow chips to communicate
with other system components through rapid light pulses and introduces a
timing flow method for 65, 90, and 130nm chips that could help minimize
power consumption.
AMD completes the design of AMD 64 dual-core processors. Intel attempts
to stop overclocking by introducing a sensor circuit that shuts the system
down, but several motherboard makers thwart the "governor" -- this will be
an endless back-and-forth struggle. Intel also completes its transition to
the 90nm process.
- Berkeley electrical engineering professors Bob Brodersen and Borivoje
Nikolic tout "energy
performance optimization" transistors as a way to efficient CMOS
systems that consume 35% less power but only slow switching speeds
by 8%.
- The Semiconductor Industry Association proposes to create a Nanoelectronics
Research Initiative to begin in 2005; the US$100 million-a-year
initiative will focus on pre-competitive research and development to help
U.S. corporations compete in post-CMOS technologies.
- IBM develops a high-speed
photodetector based on germanium-on-insulator technology (GOI) that
could allow chips to communicate with other system components through rapid
light pulses.
- IBM introduces a timing
flow method for 65, 90, and 130nm ASIC chips that should help
minimize power consumption. Variation-aware time lets engineers account
for the variables in custom chip design by analyzing the time it takes
signals to pass between circuits.
- German 3D Chips site finds a bug
in Opteron microprocessors (confused instruction ordering flaw can be
fixed with updated BIOS).
- AMD presents the first x86
dual-core processors to the industry.
- IBM developschip
design verification software that may shorten the design life cycle
and produce higher quality chips.
- Cisco and IBM design and build a complex
programmable custom chip for Cisco Carrier Routing System (CRS-1);
ASIC chip is designed to route data, voice, and video through IP networks.
- In an effort to defeat greymarket chip remarkers, Intel integrates a
circuit in 925-, 915-series motherboard "governor" chips that prevent
overclocking. Motherboard manufacturers ASUS and Gigabyte attempt to
foil Intel's overclock lock circuit using register manipulation bypass.
- Intel debuts the 64-bit,
90nm, 800MHz-bus Xeon "Nocona" processors, essentially completing
its transition to the 90nm mode of production; Intel starts a 300mm production at wafer fabrication plant in Ireland.
- Intel collaborates with CollabNet to release the successor to
BIOS firmware under the Common
Public License (CPL). Codenamed "Tiano," the pre-boot firmware will be
designed to handle more complex management and administrative tasks than
BIOS is.
- Toshiba breaks through sub-100nm limitations and debuts a 22nm bulk-CMOS transistor with metal gates and raised source/gate
extension to provide better drive current and less electrical leakage.
- At the 2004 Computex exhibition, Transmeta unveils the prototype
90nm Efficeon processors. The chip consumes almost no power when in
sleep mode and uses LongRun software to tweak transistors to reduce
electrical leakage.
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July
Analysts say that only small percentage of fab plants use 300mm wafers
which means there's a way to go before this process can be considered
adopted. eFUSE technology lets processors respond to changing conditions
and re-optimize their performance parameters on the fly.
August
Efforts into bio-engineering of semiconductor materials are explored as
another avenue to combat the problems of packing more in a smaller space.
HP issues the last ever Alpha processor system. Toyota R&D fashions
low-defect silicon carbide wafers, a substrate with properties that may
help keep chips cool.
AMD demonstrates the first dual-core x86 processor. Sony debuts a
64-bit MIPS R4000 chip for Playstation Portable, a chip with drastically
reduced power consumption needs. Convergence of multiple-vendor systems
continues.
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September
TSMC incorporates immersion lithography techniques (for 90nm process
on 300mm wafers) into production line, making it the first large-scale
fabricator to take this technology out of the lab and into production.
Spintronics gets a leap forward as an IBM Almaden research team discovers
how to measure the energy necessary to flip the magnetic orientation of a
single atom.
AMD's lead in workstation market (thanks to Opteron) causes HP to can
64-bit Itanium workstation production. Freescale demonstrates dual-core
SOI PowerPC processors. Sun's UltraSPARC IV debuts multi-chip threading
capabilities.
| Looking ahead
You've seen what was, now tell us your predictions for what will be! The year 2004 saw the use of spintronics and clockless CPUs, but what about 2005? This month's chips challenge asks you to use your imagination and power of prediction to tell us what to expect in the coming year. The most interesting, creative -- yet still plausible -- ideas will be featured in the next chips challenge article, and the top winner will receive a developerWorks t-shirt! Send your entries to the Power Architecture editors by December 31, 2004. Don't wait until it's too late!
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October
Although now becoming a de facto standard in fabrication, the
transition to 90nm is not without its problems, and UMC's and TSMC's 90nm foundries struggle with the costs of the transition. Sun announces that
after UltraSPARC IV+, it will deliver future chip fabrication to Fujitsu.
nVidia releases a chip with a hardware firewall and AMD patents a way
to place a thermo-electric cooler into chipsets, and Intel cancels 4GHz
Pentium 4 to focus on multi-core efforts.
- Two of the largest 90nm foundries, UMC and TSMC, report inconsequential
returns from the technology because of the costs associated with it.
- nVidia releases nForce4, a chip that comes with a hardware-based
firewall called ActiveArmor to keep the PC from becoming a zombie; the
chip works with AMD's Athlon 64 and 64 FX and Sempron processors.
- AMD patents a method of placing
peltier (a thermo-electric cooler, or TEC) into chip packages to make
cooling 65nm processors easier. It uses current flow between different
metals to cool junctions.
- IBM has a great month: IBM releases POWER5-based
eServers p5-520 and p5-550 and xSeries servers based on Intel Xeon
processors; it showcases Open Blade Server initiative by introducing the
POWER-based
eServer BladeCenter JS20 and the Xeon-based EM64T-based BladeCenter
HS20; and it rolls out its giant killer 64-processor, POWER5-based
eServer p5-595.
- Following the death of Netburst, Intel halts
development of the 4GHz Pentium 4. Many on P4 development team moved
to multi-core development.
- Intel announces the use of 90nm process to build IXP 23XX, a network processing unit that uses the
XScale (ARM core) processor.
- At a press conference, Intel announces it plans to reach
45nm node by 2007 by using metal gate and low-k dielectric
technologies; it plans to reach the 22nm level by 2012 by using
conventional lithography, and predicts the end of current lithography
techniques by 2014 (and the demise of CMOS scaling by 2020).
- Sun demonstrates a dual-core,
90nm UltraSPARC IV+. After shipping, the company plans to outsource
the dual-core SPARC64 VI (2006) and the 65nm eight-core follow-up Niagara
(2007) to Fujitsu.
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November
Plastic electronics start to be considered for more uses, and Infineon
demonstrates a new technique in which two chips are sandwiched together
and interconnect among hundreds of surface contact pads.
ARM plans a design center in India. By 2008, China will knock Japan out
of the top spot as consumer of chips.
AMD sees a bright future, and signs a second fabrication partner to
start in 2006. IBM and Sony debut a Cell processor workstation; IBM also
offers a commercial version of its Blue Gene supercomputer -- with
dual-core POWER5 processors (the original uses dual-core 440s). Intel
debuts Itanium Madison, probably its last 130nm chip. Texas Instruments
makes plans to convert from 200 to 300mm wafer process.
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December
- The Chinese Semiconductor Manufacturing International Corp. (SMIC) qualifies
its own 90nm process, developing the process independently.
- At the IEEE International Electronic Devices Meeting, IBM introduces strained
germanium, a technique it claims can craft circuits that can lead to
< 32nm devices by tripling the performance of today's silicon
switches. Challenges of materials availability and process will have to be
overcome in order to employ this technology in real life.
- International Data Corp. reports that over-supply
of semiconductors will cause chip revenues to shrink by about 2% in
2005 after a 26% revenue growth in 2004. The report predicts
that consumer electronics replacement cycle will clear out inventories,
causing a rise in revenues again in the 2006-08 time frame.
- Freescale Semiconductor starts
trading on the New York Stock Exchange (NYSE), beginning its new era as
a fully independent company.
- IBM debuts the first silicon
microprocessor based on an immersion lithography process, angling for
circuit features as small as 45nm from 193nm tools.
- IBM Power RISC architecture spawns a 15-company
open source initiative, Power.org. Included in the coalition are
Cadence Design Systems, Chartered Semiconductor, Novell, Sony, and
Synopsys.
- IBM debuts Cell
processors, designed to be used in workstations, Sony PlayStations
gaming consoles, and in Toshiba televisions. Programming the processor is
said to be relatively easy.
- HP gives up on Itanium and sells
its Itanium development team to Intel. As part of the deal, Intel will
keep the several hundred engineers in the Colorado location.
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Out with the old, in with the soon-to-be obsolete
Thanks for spending time with developerWorks this year. If
you'd like to comment on events and happenings in the microprocessor
space, please e-mail your thoughts and opinions to the Power Architecture editors. And don't forget to send in your microprocessor predictions for 2005 (see the sidebar, Looking ahead), and watch this space again next year to see if your predictions become history!
Here is looking forward to a great 2005!
Resources
About the author | 
| | Kane Scarlett is a technology journalist/analyst with 20 years in the business, working for such publishers as National Geographic, Population Reference Bureau, Miller Freeman, and International Data Group and managing and editing for such journals as JavaWorld, LinuxWorld, DV Magazine, NC World, and of course, developerWorks. |
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