developerWorks Cell/B.E. resource center and multicore acceleration zone changes

The Cell/B.E. resource center and the multicore acceleration zone on developerWorks are no longer available.

How to improve the performance of programs calling mathematical functions

This article introduces the IBM MASS high-performance mathematical libraries, and demonstrates how to benefit from them - without the need for source program changes - by using the auto-vectorization capability of the IBM XL C/C++ and XL Fortran compilers. After introducing the concept of auto-vectorization and the associated compiler options, a case study of a discrete Fourier transform program is offered as a real life example of auto-vectorization. Timing results demonstrate that speedups of up to 8.94 times are obtained by the compilers on the example program, via the automatic invocation of MASS by auto-vectorization.

IBM PowerPC 405 Evaluation Kit with CoreConnect SystemC TLMs

The PowerPC Evaluation Kit is no longer available from developerWorks.

Automating deployment and activation of virtual appliances for IBM AIX and Power Systems

Server virtualization enables you to rapidly provision new environments by using libraries of virtual image templates, or virtual appliances. Automated provisioning requires the management of operating system, network, and application-specific customization. This article provides a sample framework for automating virtual image deployment and activation on Power Systems, with a downloadable example that demonstrates how to provision a virtual appliance made up of IBM WebSphere Application Server V7.0 running on AIX V5.3.

developerWorks Multicore acceleration zone changes

The Multicore acceleration zone on developerWorks is no longer publishing weekly content.

A close-up of SDK 3.1, Part 2: Building examples with make.footer

The Cell/B.E. SDK 3.1 supports a pseudo "build environment" by including a make.footer file that you can include in a makefile to help you build examples and demonstrations. In this article, you can read about some of the features and functions available in the make.footer file and how they are used to construct the SDK examples.

Debugging common DMA errors

To access main storage, Cell Broadband Engine(TM) SPEs use direct memory access commands (DMA), which transfer data between the main storage and their private local memory. Although this organization of distributed storage promotes high performance, it requires the SPE programmer to explicitly handle the DMA transfers between main and local storage. Errors during these transfers can be difficult to detect and debug. This article provides techniques for handling common problems with SPE-initiated DMA transfers.

Programmability, Part 1: Exploring different approaches to programming for Cell/B.E. platforms

The programming flexibility available for the Cell Broadband Engine(TM) is a hot topic in the multicore community. This article discusses leveraging your existing skills to program for Cell/B.E.(TM), offers three programming approaches for Cell/B.E. systems, and introduces the various tools, software, and hardware available for the platform.

TechReview, Part 2: Program applications with the LAPACK library

For application programmers using the IBM Software Development Kit for Multicore Acceleration (SDK), this article explains how to program with the IBM Linear Algebra Package (LAPACK) library using a sample application designed to get an inverse matrix. The article also offers 4 pieces of advice on optimizing LAPACK programs, and it outlines the package's optimized APIs. LAPACK is based on a published standard interface for commonly used linear algebra operations in high-performance computing and other scientific domains.

Enabling applications, Part 1: Is your application ready for Cell/B.E.?

Learn from the experts how to evaluate your application's appropriateness for the Cell/B.E.(TM) platform from the standpoints of performance and power needs, the opportunities that exist for parallelism, whether the algorithms line up nicely, and whether your application has access to a Cell/B.E.-enabled library. This article is Part 1 of a 3-part series from the IBM Redbook(R) "Programming the Cell Broadband Engine: Examples and Best Practices." [09/10/08 update: Made various changes based on updates since the IBM Redbook was published.--Ed.]

TechReview, Part 1: Discover the LAPACK library

For application programmers using the IBM Software Development Kit for Multicore Acceleration (SDK), this article explains the basic structure of the IBM Linear Algebra Package (LAPACK) library. The LAPACK is based on a published standard interface for commonly used linear algebra operations in high performance computing and other scientific domains.

A close-up on SDK 3.0, Part 1: Rebuilding code from src.rpm

The Cell/B.E. SDK 3.0 includes several src.rpm packages that contain the source code for some of the SDK libraries. This article describes the steps needed to install the src.rpm, unpack the source into a directory where it can be viewed and changed, and rebuild a new rpm.

Core partners, Part 5: Increasing SPU performance with instruction scheduling

The collection of processors in a Cell Broadband Engine(TM) (Cell/B.E.) processor displays a DSP-like architecture. This means that the order in which the SPUs execute the instructions can have a significant effect on performance. Without a good scheduling mechanism in place, data dependencies can stall processor performance. In this article, learn from a Cmpware expert how and why to use the Cmpware CMP-DK Cell/B.E. SPU Scheduling Tool, which permits fast and easy analysis of SPU code in an intuitive, graphical format.

Complex networking using Linux on Power blades

Blades are an excellent choice for many applications and services, especially in the telecommunications service provider industry. But the unique requirements of these provider networks often require configurations that are complex and need up-front focus and planning so all the stringent functional requirements are met. In this article, learn how to plan and set up the necessary network configurations for a POWER6 JS22 blade deployment.

Fun with DaCS, Part 1: Using an error handler

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to create and register a user error handler for use with the Data Communication and Synchronization library (DaCS). The "Data Communication and Synchronization Library for Cell Broadband Engine Programmer?s Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

The little broadband engine that could: More on rendering fractals on the SPE

In the previous article in the series, you learned about the challenges of rendering fractals on the SPE. That article focused on the SPEs copying their rendering results directly into the target data buffer. This article shows you how the fractal generator can be optimized further by taking advantage of the SPE's fondness for vector operations.

Fun with ALF, Part 6: Using task dependency

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the Accelerated Library Framework (ALF) task dependency in a two-stage pipeline application. The "ALF for Cell/B.E. Programmer's Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

Cell/B.E. SDK: Code sample directory

In this article, you'll find tables indicating the locations of code samples that illustrate how to use the IBM SDK for Multicore Acceleration. This article will be updated with new code samples.

BladeCenter QS: Maximizing memory performance

This article compares the CBEA processor memory access model (with a focus on the IBM BladeCenter(R) QS21 and QS22) with that of general purpose processors, providing programmer guidelines to ensure that applications can be developed for maximum memory performance. This article also describes how to use the Cell Performance Counter tool when monitoring memory access activities for tuning and debugging memory performance.

Core partners, Part 4: Managing the PlayStation 3 Wi-Fi network

Terra Soft Solutions IT Manager Aaron Johnson shows you, step-by-step, how to configure and encrypt the built-in Wi-Fi network that comes with the Cell Broadband Engine(TM)-based Sony PlayStation 3. And, as a little bonus, get 16 quick steps that explain how to switch from a wireless network back to a wired network on the PS3.

The little broadband engine that could: Rendering fractals on the SPE

In the previous article in the series, you learned some reasons why there were no appreciable performance gains when you migrated the fractal-rendering program from running on one SPE to running on multiple SPEs. This article is going to illuminate the challenge of rendering fractals on the SPE. The focus is on the SPEs copying their rendering results directly into the target data buffer.

Fun with ALF, Part 5: Using overlapped I/O buffers to add matrices

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the Accelerated Library Framework (ALF) overlapped input-output buffers to perform matrix addition. The "ALF for Cell/B.E. Programmer's Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

The little broadband engine that could: Looking at some DaCS performance fine-tuning issues

In the previous article in the series, you migrated a fractal-rendering program from earlier in the series to run using the DaCS data library with no appreciable performance gains when going from running on one SPE to running on multiple SPEs. This article explores ways to optimize performance.

Fun with ALF, Part 4: Determining the dot product of large vectors

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the Accelerated Library Framework (ALF) bundled work block distribution and the task context to manage situations in which the work block cannot hold the partitioned data because of a local memory size limit. The "ALF for Cell/B.E. Programmer's Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

Evaluating IBM BladeCenter QS21 hardware performance

Although there is extensive published data about the hardware performance features of a single Cell Broadband Engine(TM) (Cell/B.E.) processor (and about the performance of a multitude of applications ported to it), there is little on the specific hardware performance features of the IBM BladeCenter(R) QS21 using a coherent SMP node of two Cell/B.E processors as well as an elaborate IO subsystem. In this article, the authors close that gap by providing information about basic latencies, throughputs, and relative execution times for some key computational benchmark kernels, such as Linpack and SPEC2000. The article also delivers a basic architectural overview of the system. And, you can get tips on how to optimize application performance.

Fun with ALF, Part 3: Finding minimum and maximum values

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the Accelerated Library Framework (ALF) task context to keep the partial computing results for each task instance and then combine them. The "ALF for Cell/B.E. Programmer's Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

The little broadband engine that could: DaCS--flexible and complex

In an earlier article in this series, the author introduced a fractal-generation program built around the IDL interface that showcased the strength of IDL's straightforward API. Executing the program was almost like calling a function and getting results. In this article (and using the same basic program), the author demonstrates the Data Communication and Synchronization library's (DaCS) greater flexibility and the tradeoff: additional complexity. With DaCS, it's possible to pass the fractal pattern in as an initial argument, then use buffers to pass data back and forth as they are processed. While this requires more design work, but it might actually be more efficient. This article also shows that DaCS allows for much more carefully tuned inputs and outputs.

Cell/B.E. SDK 3.0 tools, Part 1: Using performance tools

This introductory tutorial, designed as a companion for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine(R) SDK), teaches you how to use five performance tools that reside in the SDK 3.0: OProfile, Cell Performance Counter, Performance Debugging Tool, the PDT Trace Reader, and FDPR-Pro. The Visual Performance Analyzer, available separately, is also highlighted.

Linux development on the PlayStation 3, Part 3: Slimming down X11 with tiny tools

The Sony PlayStation 3 (PS3) runs Linux, but getting it to run well requires some tweaking. In the third and final article of this series on PS3 Linux, Peter Seebach talks about ways to get X11 slimmed down to fit on a smaller memory budget.

Core partners, Part 3: Transforming Gedae-built portable apps

This concise study examines the portability of applications developed in Gedae by analyzing the work required to move an example application from a simulation on a PC to actually running on a DSP board (the Mercury Computer System AdapDev system) to running on a multicore Cell Broadband Engine(TM) (Cell/B.E.). The article illustrates how architecture considerations were taken into account when porting the application to each system. You can see the amount of work required to port the application and the performance of the application on each system.

Linux development on the PlayStation 3, Part 2: Working with memory

The Sony PlayStation 3 (PS3) runs Linux, but getting it to run well requires some tweaking. In this article, the second in a series, Peter Seebach takes a look at where all the memory goes and how to reclaim it.

Fun with ALF, Part 2: Converting I/O data

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the Accelerated Library Framework (ALF) task context buffer as a large lookup table to convert the 16-bit input data to 8-bit output data. The "ALF for Cell/B.E. Programmer's Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

Linux development on the PlayStation 3, Part 1: More than a toy

The Sony PlayStation 3 (PS3) runs Linux, but getting it to run well requires some tweaking. In this article, first in a series, Peter Seebach introduces the features and benefits of PS3 Linux, and explains some of the issues that might benefit from a bit of tweaking.

Fun with ALF, Part 1: Adding large matrices together

In this Cell Broadband Engine(TM) (Cell/B.E.) series, learn how to use the Accelerated Library Framework (ALF) in the IBM SDK for Multicore Acceleration 3.0 to add two large matrices together. There is one example for host data partitioning and one for accelerator data partitioning. The "ALF for Cell/B.E. Programmer's Guide and API Reference, Version 3.0" (see Resources) is the source for the content.

The little broadband engine that could: IDL is dead--long live DaCS!

In SDK 3.0, the Data Communication and Synchronization library (DaCS) provides a sparkling substitute for IDL. DaCS is a set of services to aid the development of applications and application frameworks in a heterogeneous multi-tiered system. This article takes you on a tour of the DaCS process model and explores general DaCS principles, including communication and memory access.

The little broadband engine that could: Reviewing the newest little SDK that installs natively on PS3

Come along on a little train tour of the SDK for Multicore Acceleration 3.0 to see what's different for developers and how you can make good use of the SDK, including native installation on PS3, support for FC7 and RHEL 5.1, enhanced compilers, Fortran and Ada support, BLAS, ALF, and DaCS--oh my!

Core partners, Part 2: Using DDT to clean up Cell/B.E. app bugs

Allinea Software's Distributed Debugging Tool (DDT) provides an easy-to-use, capable debugger that is able to debug complete Cell Broadband Engine applications, including multiple threads within a single Cell/B.E. processor and clusters of Cell/B.E. processors.

Cell/B.E. container virtualization, Part 2: Implementation issues

This three-part series illustrates a hardware-resource-focused form of software virtualization known as container virtualization (or operating system virtualization), demonstrated through the open source project OpenVZ. The series provides a comprehensive overview of all the components and techniques needed to virtualize the Cell/B.E. processor with software methods. This second article of the series details the implementation of dedicated virtualization and partitioning that was described in Part 1 of the series.

Cell/B.E. container virtualization, Part 1: Concepts, architectures, and tools

This three-part series illustrates a hardware-resource-focused form of software virtualization known as container virtualization (or operating system virtualization), demonstrated through the open source project OpenVZ. The series provides a comprehensive overview of all the components and techniques needed to virtualize the Cell/B.E. processor with software methods. This first article of the series discusses the basic concepts involved, illustrates the salient points of the OpenVZ and Cell/B.E. architectures and how they work together, and describes some of the OpenVZ tools.

Cell/B.E. SDK 3.0, Part 1: Create an SPU project

This introductory tutorial, designed for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK), explores the Cell/B.E. processor IDE and gives developers a click-for-click walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application launcher, debugging and doing performance analysis, using simulator consoles, using the ALF wizard, and setting IDE preferences.

Cell/B.E. SDK 3.0, Part 4: Configure the application launcher

This introductory tutorial, designed for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK), explores the Cell/B.E. processor IDE and gives developers a click-for-click walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application launcher, debugging and doing performance analysis, using simulator consoles, using the ALF wizard, and setting IDE preferences.

Cell/B.E. SDK 3.0, Part 3: Create the Cell/B.E. simulator environment

This introductory tutorial, designed for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK), explores the Cell/B.E. processor IDE and gives developers a click-for-click walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application launcher, debugging and doing performance analysis, using simulator consoles, using the ALF wizard, and setting IDE preferences.

Cell/B.E. SDK 3.0, Part 6: Use simulator consoles, use the ALF wizard, and set IDE preferences

This introductory tutorial, designed for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK), explores the Cell/B.E. processor IDE and gives developers a click-for-click walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application launcher, debugging and doing performance analysis, using simulator consoles, using the ALF wizard, and setting IDE preferences.

Cell/B.E. SDK 3.0, Part 5: Debug and complete dynamic or static performance analysis

This introductory tutorial, designed for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK), explores the Cell/B.E. processor IDE and gives developers a click-for-click walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application launcher, debugging and doing performance analysis, using simulator consoles, using the ALF wizard, and setting IDE preferences.

Cell/B.E. SDK 3.0, Part 2: Create a PPU project

This introductory tutorial, designed for the IBM SDK for Multicore Acceleration, Version 3.0 (otherwise known as the Cell Broadband Engine SDK), explores the Cell/B.E. processor IDE and gives developers a click-for-click walk-through of building a simple project in this environment. This tutorial is broken into six quick-perform parts dealing with creating an SPU project, creating a PPU project, creating the Cell/B.E. simulator, configuring the application launcher, debugging and doing performance analysis, using simulator consoles, using the ALF wizard, and setting IDE preferences.

Porting workshop, Part 7: Getting the most performance

The seven quick-read parts of this "Porting workshop" series take you on a real-world trip from strategy and planning through workload execution, performance tweaking, optimization, and a solid conclusion. The series describes how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In part seven, the authors evaluate the performance data to date.

Cell/B.E. SDK: Understanding the terminology

A quick-reference glossary of terms you might encounter when installing and using the Cell Broadband Engine (Cell/B.E.) processor SDK.

Porting workshop, Part 6: Tying it all together

The seven quick-read parts of this "Porting workshop" series take you on a real-world trip from strategy and planning through workload execution, performance tweaking, optimization, and a solid conclusion. The series describes how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In this Part 6, the authors provide a summary of what the series has covered so far.

Minimize recoding impact, Part 2: Removing obstacles to speedy performance

The first article in the series describes how to do a basic port to the Cell Broadband Engine process. This second article goes further in hammering out the details, including removing limitations based on DMA-transfer size, partitioning the program across multiple SPEs, and improving the program's speed even more.

PS3 fab-to-lab, Part 2: Generating and analyzing signals

How do you take the Cell Broadband Engine (Cell/B.E.) processor from an off-the-shelf Sony PLAYSTATION 3 (PS3) and use it to construct a piece of Linux(R)-based laboratory equipment (in essence, take the Cell/B.E. from fab to hab to lab)? In this series, Lewin Edwards shows you how to go from game console to simple audio-bandwidth spectrum analyzer and function generator. In this article, the author shows you how to build on the infrastructure from Part 1 to make the system into a fully operational, if primitive, spectrum analyzer.

Porting workshop, Part 5: Mixed-precision workloads

The seven quick-read parts of this "Porting workshop" series take you on a real-world trip from strategy and planning through workload execution, performance tweaking, optimization, and a solid conclusion. The series describes how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In this Part 5, the authors determine how to make mixed-precision calculations work with the sample application.

IBM Installation Toolkit: Loading Linux on POWER

The IBM Installation Toolkit for Linux on POWER simplifies the installation of Linux on virtualized and non-virtualized Power machines, gives you a bootable rescue DVD, and provides the software needed to fully exploit the Power platform. Learn to use the toolkit to install Red Hat Enterprise Linux and SUSE Linux Enterprise Server on IBM System p and System i5 machines.

The little broadband engine that could: Use multiple SPEs for a single task

Peter Seebach uses a simple, iterative-function fractal generator program to describe how to use multiple Synergistic Processor Engines (SPEs) to vectorize a single task using the job queue model.

Porting workshop, Part 4: Mersenne-Twister

The seven quick-read parts of this "Porting workshop" series take you on a real-world trip from strategy and planning through workload execution, performance tweaking, optimization, and a solid conclusion. The series describes how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In this Part 4, the authors explore the Mersenne-Twister random-number generator to determine its effect.

Porting workshop, Part 3: Initial performance results

The seven, quick-read parts of this series, "Porting workshop," take you on a real-world trip from strategy and planning through workload execution through performance tweaking through optimization to a solid conclusion -- how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In part three, the authors run and review performance tests and data on the modified code.

Minimize recoding impact, Part 1: How to make an SPE and existing code work together

Traditional porting requires identifying and abstracting out the architecture-dependent code: making code endian-independent, working through minor API differences, and including the appropriate header files and libraries. While this procedure works for getting code to run on the Cell Broadband Engine (Cell/B.E.) processor, to actually use the extra processing elements, you have to put in extra work, including reworking the code and rethinking the build process. In this series, learn to take advantage of the Synergistic Processor Elements (SPEs) in existing code and only make a minimal impact to the existing code and build process.

The little broadband engine that could: Why is my scalar code so slow?

The SIMD-only architecture of the Cell Broadband Engine (Cell/B.E.) processor's Synergistic Processor Engine (SPE) is an architecture that has no scalar operations -- all operations are performed on 16-byte vectors. Design code that helps the Cell/B.E. compiler make efficient use of this architecture.

Porting workshop, Part 2: Original code analysis

The seven, quick-read parts of this series, "Porting workshop," take you on a real-world trip from strategy and planning through workload execution through performance tweaking through optimization to a solid conclusion -- how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In part two, explore the original code with Linux profiling tools.

Porting workshop, Part 1: Processor porting strategies

The seven, quick-read parts of this series, "Porting workshop," take you on a real-world trip from strategy and planning through workload execution through performance tweaking through optimization to a solid conclusion -- how to most effectively port compute-intensive applications to the Cell Broadband Engine platform. In part one, discover the top three strategies for porting.

Changes in libspe: How libspe2 affects Cell Broadband Engine programming

The standard library that Power Processor Element (PPE) programs use to access and manage Synergistic Processor Elements (SPEs), called libspe, has undergone a major revision. The Cell Broadband Engine (Cell/B.E.) SDK 2.1 officially changes the library interface from libspe1 to libspe2. In this article, Jonathan Bartlett introduces the libspe2 concepts and shows how to do basic SPE process management and communication with libspe2.

The little broadband engine that could: Mailboxes and interrupts

Meet two more means of communication between the SPE and the PPE -- mailboxes and signal notification. Mailboxes are special-purpose registers, similar to the I/O registers used to communicate with peripheral devices on some systems, available on the SPEs and the PPE. Signal notification registers are registers which can be read or written to by the PPE, but which the SPE can only read.

Porting practices: Compute-intensive applications

The Cell Broadband Engine (Cell/B.E.) processor has powerful computation capabilities, but to fully unleash its power, you need to provide a unique programming paradigm. In this article, learn best practices for porting a JPEG compression application to the Cell/B.E. Synergistic Processor Engine (SPE), and see how to take advantage of the processor's unique architecture and avoid its shortcomings.

Tech tips: Ten helpful tips when building SPE applications in C

These ten tips can save you a lot of trouble when you're coding your C applications for the Cell Broadband Engine (Cell/B.E.) SPU.

The little broadband engine that could: An introduction to using SPEs for Cell Broadband Engine development

In this first article in a series on Cell Broadband Engine (Cell/B.E.) development, Peter Seebach introduces the API used to run programs on SPEs, focusing specifically on loading code on an SPE and sending data to it for processing.

PS3 fab-to-lab, Part 1: Build Linux lab equipment from a Sony PLAYSTATION 3

How do you take the Cell Broadband Engine (Cell/B.E.) processor from an off-the-shelf Sony PLAYSTATION 3 (PS3) and use it to construct a piece of Linux-based laboratory equipment (in essence, taking the Cell/B.E. from fab to hab to lab)? In this series, Lewin Edwards shows you how to go from game console to simple audio-bandwidth spectrum analyzer and function generator. First up, uncover the design intent of the project and then make a close inspection of the details of the user interface implementation as you start a journey to generate and analyze signals on the Cell/B.E. processor.

Core partners, Part 1: Build high-performance apps for multicore processors

The RapidMind Development Platform provides a simple single-source mechanism to develop portable high-performance applications for multicore processors. In particular, you can use it to develop applications that fully exploit the power of the Cell Broadband Engine (Cell/B.E.) processor's unique architecture by writing only one, single-threaded C++ program using an existing C++ compiler. In this article, author Michael McCool takes you on a guided tour of the RapidMind Development Platform.

Tech tips: SPU vector intrinsics at your fingertips

Know these common C/C++ language extensions intrinsics and greatly simplify the arduous task of using the SPU's assembly language.

Cell/B.E. SDK 2.1: Setting up Fedora Core 6

Before you can install and use the Cell Broadband Engine (Cell/B.E.) processor SDK Version 2.1, you need to get Fedora Core 6 up and running. Here's how.

SoC drawer: The Cell Broadband Engine chip: High-speed offload for the masses

Cell Broadband Engine (Cell/B.E.) chips are leading the broadband revolution in computing and provide the core silicon DNA for supercomputing, medical image processing, and many emergent applications, as worldwide connectivity and bandwidth continue to change the world we live in. This article explores the performance of application code on the Sony PLAYSTATION 3's Cell Broadband Engine system running Yellow Dog Linux. A simple program demonstrates how multithreaded applications that use the Synergistic Processing Elements to offload work can enjoy tremendous speedup.

Massively multiplayer online games, Part 1: A performance-based approach to sizing infrastructure

Massively multiplayer online games (MMOGs) are some of the most complicated software systems under development today, often requiring dozens of developers, hundreds of artists, and truly massive infrastructures. This article is the first in a series of articles that will shine a light on the systems, storage, and networks needed to run an MMOG. It provides an introduction to MMOGs and demonstrates one approach to sizing a game's infrastructure. Learn how to figure out how much infrastructure you might need, as well as how to operate an MMOG.

The Power Architecture Time Base register in 64-bit Linux

Use the Power Architecture technology's Time Base register to measure time at the nanosecond level in Linux on PowerPC and Cell Broadband Engine (Cell/B.E.) microprocessors. Applications where this is useful include timestamping transactions (typically encrypted or digitally signed single-use messages), profiling code, and implementing small, precise software delays.

Programming high-performance applications on the Cell/B.E. processor, Part 6: Smart buffer management with DMA transfers

Explore the concepts of double-buffering and multibuffering to improve code speed by parallelizing processing and data transfer, and allowing the SPE's memory flow controller (MFC) to coordinate the best order of operations for loading and storing.

An introduction to the IDE for the Cell Broadband Engine SDK

This introductory tutorial, updated for the Cell Broadband Engine (Cell BE) SDK V2.1, explores the Interactive Development Environment (IDE) of the Cell BE processor and gives developers a click-for-click walk-through of building a simple project in this environment.

Programming high-performance applications on the Cell BE processor, Part 5: Programming the SPU in C/C++

In Part 5 of the "Programming high-performance applications on the Cell BE processor" series, apply your knowledge of the synergistic processing unit (SPU) to programming the Cell Broadband Engine (Cell BE) processor in C/C++. Learn how to use the vector extensions, direct the compiler to do branch prediction, and perform DMA transfers in C/C++.

The Heath Robinson Rube Goldberg Computer, Part 4: The battle to make the virtual cabinets work

Nothing is as easy as one might hope. Since the last article was posted, the Heath Robinson Rube Goldberg (HRRG) Computer team has been battling every step of the way to bring the HRRG emulator's virtual cabinets online. On the way, we've re-engineered everything several times, and run across some unanticipated scenarios...

Programming high-performance applications on the Cell BE processor, Part 4: Program the SPU for performance

Write optimal code for the Cell Broadband Engine (Cell BE) processor's synergistic processing unit (SPU) and have your programs running lightning fast. This installment of "Programming high-performance applications on the Cell BE processor" covers SIMD vector programming, branch elimination, loop unrolling, instruction scheduling, and branch hinting techniques. Previous installments have covered the basics of the Sony PLAYSTATION 3, the Cell BE architecture, and SPU programming.

Programming high-performance applications on the Cell BE processor, Part 3: Meet the synergistic processing unit

Continue looking in depth at the Cell Broadband Engine (Cell BE) processor's synergistic processor elements (SPEs) and how they work at the lowest level. This installment explores storage alignment issues and the communication facilities of the SPEs.

Xilinx hijinx, Part 2: Building and loading bitstreams and PowerPC code

Explore both the hardware and software sides of a complete Virtex4 project. In this second and final installment of the Xilinx hijinx series, you add and remove device cores from your project, interconnect project components, build the bitstream, integrate it with C code, and download the entire thing to the FPGA.

Programming high-performance applications on the Cell BE processor, Part 2: Program the synergistic processing elements of the Sony PLAYSTATION 3

Take even greater advantage of the synergistic processing elements (SPEs) of the Sony PLAYSTATION 3 (PS3) in this installment of "Programming high-performance applications on the Cell BE processor." Part 1 showed how to install Linux on the PS3 and explored a short example program. Part 2 looks in depth at the Cell Broadband Engine processor's SPEs and how they work at the lowest level.

Xilinx hijinx, Part 1: The ML403 out-of-box experience

Discover reasons you might choose an FPGA-based system over a traditional hard-IP microcontroller, and identify the learning curve traditional programmers face when meeting RAM-based programmable logic for the first time. In this new series, Lewin Edwards unpacks the Xilinx ML403 Embedded Development Kit and sorts out some of its idiosyncrasies.

SoC drawer: SoCs and the digital content revolution

SoC (system-on-a-chip) architectures could significantly accelerate digital video processing and enable the digital video revolution. Sam Siewert offers an overview of digital video processing and emergent applications in the video realm and shows how SoCs can uniquely accelerate processing. If you're an SoC architect, developer, Power Architecture platform software developer, or anyone creating digital video applications and services, this article is for you.

The Heath Robinson Rube Goldberg Computer, Part 3: Introducing the HRRG emulator

The continuing effort to add at least one series of (vacuum) tubes to the Internet progresses with an introduction to the workings of and thinking behind the Heath Robinson Rube Goldberg (HRRG) emulator. And stay tuned because next time you'll get to download it.

Programming high-performance applications on the Cell BE processor, Part 1: An introduction to Linux on the PLAYSTATION 3

The Sony PLAYSTATION 3 (PS3) is the easiest and cheapest way for programmers to get their hands on the new Cell Broadband Engine (Cell BE) processor and take it for a drive. Discover what the fuss is all about, how to install Linux on the PS3, and how to get started developing for the Cell BE processor on the PS3.

Tuning the CPC945 memory controller

Don't let these disasters happen to you: A pox on modern engineering, Part 2

While per-transistor failure rates may be down, overall reliability hasn't declined as much as people sometimes assume, and modern systems are often much harder to repair than older ones. Following up on a previous article, Lewin Edwards reviews more of the problems modern engineers face.

The Heath Robinson Rube Goldberg Computer, Part 2: Partitioning the system

In Part 2 of the Heath Robinson Rube Goldberg (HRRG) Computer series, learn how to partition the system, trading off between implementation complexity, granularity, and flexibility, while also minimizing the bandwidth required to communicate among the various modules.

Directions: IBM and partners open up the silicon supply chain with the Common Platform

Steve Longoria, IBM vice president of Semiconductor Platforms, discusses the collaboration among IBM, Chartered, and Samsung in the open Common Platform technology initiative, and how the move is shaking up the industry's traditional closed model.

Don't let these disasters happen to you: A pox on modern engineering, Part 1

Between IP litigation and ever greater demands for "baseline" functionality that requires licensing, developing new products has become a treacherous minefield for engineers to navigate. In this article, Lewin Edwards outlines some of the dangers which are making it harder for engineers to just get out there and build something.

SoC drawer: Eyes inside the silicon

Author Sam Siewert describes basic methods and tools that can provide eyes into the silicon for architects, designers, and engineers working with reconfigurable systems-on-chips (SoCs). SoCs like the Xilinx Virtex line provide a hybrid platform for hardware and software co-design and implementation of real-time services and digital signal processing. Hybrid SoCs employing Power Architecture technology-based software interfacing to highly customized hardware state machines can help designers unlock the power of application-specific hardware acceleration. The integration of the Power Architecture cores with reconfigurable logic provides a powerful prototyping and product platform for SoCs. This power can be better unleashed using trace, debug, and analysis tools to visualize and tune hardware and software interfaces and interaction.

The Heath Robinson Rube Goldberg Computer, Part 1: Implementing a computer using a mixture of technologies from relays to fluidic logic

Imagine a computer formed from a mixture of technologies ranging from relays to fluidic logic. Now imagine being able to create a single piece of such a computer (perhaps as small as a single word of memory) in the technology of your choice, and then using the Internet to run your masterpiece in conjunction with other portions of the system created by contributors located around the world! Author Clive (Max) Maxfield explains the creation of just such a computing engine and how you can be involved.

Taking OpenPower for a spin, Part 2: Porting issues in targeting 64-bit systems

In Part 2 of the Taking OpenPower for a spin series, Peter Seebach reviews code portability issues when porting to 64-bit systems, looking in particular at code and data portability, with concrete examples of some of the rare kinds of code that require real modification.

Taking OpenPower for a spin, Part 3: How to avoid having to port your code

Why is porting even hard? In this last article of the "Taking OpenPower for a spin" series, Peter Seebach looks at what kinds of issues are involved with portability from one architecture to another and contrasts APIs with hardware interfaces.

Taking OpenPower for a spin, Part 1: Exploring 64-bit development on POWER5

The OpenPower program offers free remote access to servers running 64-bit Linux on POWER5 processors. In Part 1 of the Taking OpenPower for a spin series, author Peter Seebach introduces the process of getting access to a system and compiling applications for it, both as 32-bit and 64-bit applications. He pays particular attention to issues unique to "guest" software development without root privileges -- something most Linux users have never had to do.

Testing and measuring the TAMS 3011, Part 6: Booting NetBSD on new hardware, the saga begins

Porting an operating system to new hardware can be a fairly easy process, or a fairly difficult one, depending on the issues you encounter. Peter Seebach walks you through his experience getting NetBSD running on a new board using existing hardware.

Standards and specs: XML: Half a standard is better than none

A pervasive misconception common today is that simply designing your file format around XML somehow makes it magically portable, extensible, and intelligible by other programs. Peter Seebach explains why using XML is only part of the story when you're designing an extensible file format.

Don't let these disasters happen to you: Five more engineering hints you'll rarely hear

Lewin Edwards presents five more engineering tips, this time aimed at smaller companies without the overhead, or support structures, of a larger organization.

Multifunction multimedia machine, Part 5: Remote control is the new local interface

Add a Web-based user interface to a previously developed multimedia client in this episode of the Multifunction multimedia machine series. Author Lewin Edwards looks both at user-interface and back-end design issues, and shows how local browser functionality is an interesting alternative to requiring a remote browser.

SoC drawer: SoC design for hardware acceleration, Part 2

In the SoC design for hardware acceleration series, author Sam Siewert migrates a simple C function to a SystemC specification that can be simulated and verified for ultimate implementation as a hardware function. Part 1 provided the C code and a general overview of video capture, streaming, and processing. Part 2 shows how hardware acceleration of emergent applications, such as video streaming, can benefit from system-on-chip (SoC) design and reconfigurable SoCs with hybrid C software and field-programmable gate array (FPGA)-based functionality.

Standards and specs: Of RoHS and rushed standards

When the ex cathedra RoHS Directive came down, it was missing a little crucial piece of information -- how manufacturers, distributors, and purchasers of parts could communicate to each other the RoHS status of every part.

Debugging Cell Broadband Engine systems

Software development for new architectures can be an intimidating prospect, but the Cell Broadband Engine (Cell BE) SDK 1.1 provides the debugging tools you need to tackle it for the Cell BE architecture. This article describes how to use new versions of the GNU Debugger (GDB) to diagnose problems in both PPU and SPU programs.