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An introduction to compiling for the Cell Broadband Engine architecture, Part 3: Make the most of SIMD

When all you have is a vector unit, everything looks like a parallel operation

developerWorks

Level: Introductory

Power Architecture editors , developerWorks, IBM

07 Feb 2006

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Third in the "An introduction to compiling for the Cell Broadband Engine™ architecture" series, this tutorial discusses the compiler issues in optimizing code to run efficiently on SIMD-capable processors. In particular, it shows how to optimize code that must run both on the VMX SIMD engine of the PowerPC® core of the Cell Broadband Engine (Cell BE) processor, and also on the SIMD-only Synergistic Processor Elements (SPEs).

In this tutorial

  • Automatic simdization

  • Simdization technique highlights

  • SIMD code generation

  • Managing complexity

  • How to support the cross product of all of these?

  • Example 1: Basic-block and loop-level aggregation

  • Example 2: Data-size conversion and misalignment

Prerequisites

This tutorial presupposes familiarity with the material in the first tutorial in the series, specifically computer architecture in general and the Cell BE architecture in particular, and basic familiarity with what compilers do. Familiarity with the second tutorial, "Optimizing for the SPE," is also helpful.


System requirements

None



Duration

Under two hours


Formats

html, pdf


Other parts in this series

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An introduction to compiling for the Cell Broadband Engine architecture